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AI for Yield & Diagnostics, Senior Engineer

Qualcomm

$115,600 - $173,400
Nov 13, 2025
San Diego, CA, United States of America
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Qualcomm Technologies, Inc. is seeking an AI Applications Engineer to develop and deploy artificial intelligence solutions for improving silicon & assembly yield analysis and advanced diagnostics in semiconductor manufacturing, aiming to enhance product quality and manufacturing efficiency.

Requirements

  • Strong coding skills in Python and experience building AI-driven applications.
  • Hands-on experience with GenAI concepts (LLMs, RAG, prompt engineering) and frameworks like LangChain.
  • Solid foundation in data analytics and ability to learn semiconductor workflows quickly.
  • Strong understanding of semiconductor test methodologies, scan diagnostics, and yield analysis.
  • Familiarity with DFT concepts, fault models, and EDA tools (e.g., Synopsys, Cadence).
  • Experience with AI applications in semiconductor manufacturing or test engineering.
  • Background in deploying AI models in production environments.

Responsibilities

  • Design and implement AI/ML models to analyze silicon yield data and identify patterns, anomalies, and root causes of failures.
  • Develop predictive models to forecast yield trends and proactively address potential issues.
  • Apply deep learning and statistical techniques to improve scan diagnostic resolution and fault localization.
  • Collaborate with test engineering teams to collect, clean, and structure large-scale test and yield datasets.
  • Integrate data from ATE (Automated Test Equipment), DFT (Design for Test), and fab & assembly process logs for comprehensive analysis.
  • Build scalable pipelines and tools that integrate AI models into existing diagnostic and yield analysis workflows.
  • Work closely with EDA vendors and internal software teams to enhance tool capabilities with AI-driven features.

Other

  • Partner with design, test, and manufacturing teams to understand challenges and translate them into AI solutions.
  • Communicate findings and recommendations to stakeholders through clear visualizations and reports.
  • Excellent communication skills in English; proven ability to lead technical initiatives.
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.