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ASIC and Logic Design Engineering Manager (Teradyne, North Reading)

Teradyne

$151,300 - $242,200
Oct 1, 2025
North Reading, MA, US
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Teradyne Compute Test Division Engineering team is seeking a hands-on first level manager to lead their System Integration and Hardware Abstraction Layer (HAL) team. Development occurs in a dynamic and challenging multi-site development environment. The ideal candidate will have a passion for working with hardware and software subject matter experts to make complex hardware and software come together into a working system.

Requirements

  • Software coding using C and C++.
  • System integration in both Linux and Windows environments.
  • Languages: Expertise in C, C++ coding and in a scripting language (Python, TCL, PERL…) required.
  • Familiarity with Verilog, System Verilog, UVM, VHDL preferred.
  • Operating Systems: Windows, Linux
  • Development Tools: Microsoft Visual Studio, GIT, Clearcase/Version Vault, JIRA
  • Excellent troubleshooting, debugging, and problem solving skills.

Responsibilities

  • Manage multiple simultaneous (typically 2-3) HAL development projects including:
  • Project planning
  • Schedule/budget tracking
  • Resource management
  • Status reporting to management
  • Technical oversight: doc/code reviews, bug tracking
  • Hands-on HAL code architecture, implementation, testing and product integration debug as required.

Other

  • 1-3 years technical line management experience.
  • 5+ years of experience in technical project leadership
  • Experience integrating HW and SW in complex systems.
  • Solid verbal, written and presentation skills.
  • Experience working in cross-functional teams designing complex systems