Lockheed Martin RMS is seeking a Summer 2026 ASIC & FPGA Design Engineering Intern to support firmware design and architecture development, implement FPGA designs, and integrate and troubleshoot designs.
Requirements
- FPGA design and verification procedures and tools
- System Verilog or VHDL
- Intel/Altera/Xilinx products and tool sets (e.g. Quartus and/or Vivado)
- MATLAB
- experience with ASIC design
- experience with digital, analog, and power electronics circuits
- familiarity with laboratory engineering tools
Responsibilities
- support firmware design and architecture development
- implement FPGA designs
- integrate and troubleshoot designs
- experience with FPGA design and verification procedures and tools
- familiarity with System Verilog or VHDL
- experience testing and debugging complex analog, digital, and power electronics circuits
- familiarity with common laboratory engineering tools including logic analyzers, oscilloscopes, power supplies, function generators, digital multi-meters, and other support equipment
Other
- Pursuit of a B.S degree in Electrical or Computer Engineering degree (or similar)
- Ability to work in a collaborative and team-based environment
- Excellent Leadership/Communication/Team Skills
- Excellent written and verbal communication skills
- Security Clearance
