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Micron Technology is looking to transform how the world uses information to enrich life for all by innovating memory and storage solutions, and the role of Semiconductor Package Simulation & Architecture Engineer is to build the future of semiconductor packaging technology.

Requirements

• Proficiency in electrical simulation software (e.g., Ansys HFSS, SIWAVE, Mentor Xpedition, Cadence Sigrity)
• Skills in using mechanical modeling software (e.g., ANSYS Mechanical, Abaqus, COMSOL) for thermomechanical analysis, warpage prediction, and reliability evaluation
• Experience with multi-physics simulation and co-development environments
• Strong background in package layout, substrate composition, interposer technology, and advanced packaging platforms (FC-BGA, SiP, 2.5D/3D IC, etc.)
• Knowledge of DFM (Build for Manufacturability) and DFx or equivalent experience (Build for Test, Reliability, Cost)
• Familiarity with CAD tools and package composition software (e.g., Cadence Allegro Package Composer, Mentor Graphics, AutoCAD)
• Understanding of industry standards (JEDEC, IPC, IEEE) and regulatory compliance as it relates to packaging materials and structures

Responsibilities

• Coordinate technology staging, leading all aspects of electrical, mechanical, and logical requirements
• Ensure package development aligns with both product and system integration goals through extensive collaboration with multi-functional teams
• Develop comprehensive packaging solutions that meet power, performance, area, and reliability (PPAR) objectives
• Integrate package requirements with silicon and board/system-level constraints
• Align package, board, and system constraints
• Lead technical interface between packaging teams and platform/system architects
• Perform root cause analysis using empirical and simulation data, and develop solutions for reliability improvement

Other

• Excellent verbal and written communication skills; ability to convey sophisticated technical concepts to diverse audiences
• Experience crafting user documentation, developing specifications, and whitepapers
• Mentorship and leadership experience in cross-disciplinary environments
• PhD or Master’s degree in Electrical Engineering or Mechanical Engineering
• 15+ years of relevant experience in semiconductor packaging engineering or related fields