L3Harris is looking to solve the business problem of delivering FPGAs for defense applications by hiring an ASIC/FPGA VHDL Design Engineer. This role is crucial for ensuring the robust quality and delivery of communication products for National Security.
Requirements
- Experience designing FPGA products with VHDL
- Experience with mapping algorithms to architecture
- Experience in C++ (OOP)
- Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
- Experience with Xilinx SoC design with SDKs and PetaLinux OS
- Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
- Experience with Xilinx FPGAs and Vivado
Responsibilities
- Architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols.
- Derive FPGA design specifications from system requirements
- Develop detailed FPGA architecture for implementation
- Implement design in RTL (VHDL) and perform module level simulations
- Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
- Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA
- Generate verification test plans and perform End to End Simulations
Other
- Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
- Good written, verbal, and presentation skills
- Active DoD Security Clearance
