Marvell's Custom Compute and Storage (CCS) Business unit needs to develop advanced and highly complex SoCs, and the Emulation Center of Excellence (CoE) team is responsible for delivering emulation infrastructure, validating designs on emulation, and driving left shift of software and post-silicon readiness for all CCS products. This role will drive the emulation strategy, vendor platform enablement, and test plan execution for high-quality design tape-outs.
Requirements
- Good understanding of digital logic design using Verilog/System Verilog.
- Knowledge of UVM validation flow or other validation methodologies is a plus.
- Knowledge of simulation tools from any vendors (Cadence, Siemens or Synopsys) is a plus.
- Knowledge of Emulation tools from any vendors (Cadence, Siemens or Synopsys) is a plus.
- Experience in programming and scripting languages such as Python, Perl, Tcl
- Good understanding of Linux/Unix, with experience working on distributed systems
Responsibilities
- Develop understanding of the UVM testbench methodology.
- Build and run a simulation of a Marvell IP using the UVM test methodology
- Understand key concept of the UVM methodology: Agent , Driver , Sequencer , Monitor , Scoreboard
- Review the testbench and understand the part of UVM sequence that would be require in emulation
- Build and run an emulation model using the output of the Python script
- Validate that simulation and emulation behavior are matching
Other
- Currently pursuing a Bachelor's degree in Computer Science, Electrical Engineering, or related fields.
- Effective teamwork and communication skills
- This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law.
- candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
