AMD is looking for Firmware designers for the development of high-speed LPDDR, DDR and inter-chip IO IPs to enable new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level.
Requirements
- Knowledge of C, C++ and any scripting language
- knowledge of Verilog and Python is a plus
- Ability to adapt/learn new toolsets and frameworks is required
- Understanding of synchronization techniques (handshakes, message passing)
- knowledge of hardware level clocking and synchronization is a plus
Responsibilities
- Firmware design and development of DDR PHY & DRAM Training steps
- Firmware development of DDR PHY for ATE Testing, IP Char & SoC Power
- Pre-silicon FW coding and simulation against Architectural and RTL models
- Post-silicon lab bring-up and optimization of DDR Init and Run Time FW
- Post-silicon DDR Training enhancements to enable robust links for higher reliability / higher frequency margin
- Working with SoC/Product firmware teams to define features and specs
- Lead day-to-day firmware development work
Other
- Strong analytical/problem-solving skills and pronounced attention to details.
- Must be a self-starter, and able to independently drive tasks to completion.
- Strong interpersonal and communication skills
- Experience in mentoring junior engineers
- Expert level experience producing quality firmware
