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FPGA SEPP Engineering Intern(Summer 2026)(Onsite)

RTX

Salary not specified
Oct 8, 2025
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RTX's Displays FPGA team is developing a cutting-edge toolchain to automate the creation of register blocks, documentation, and tests for FPGA/ASIC development. Existing tools do not meet the rigorous requirements of a certified DO-254 avionics device, necessitating the development of a new, robust, and reliable toolchain to enhance productivity and ensure compliance with safety-critical aerospace standards.

Requirements

  • Familiarity using an FPGA vendor tool suite
  • Proficiency in scripting languages, particularly Python.
  • Understanding of avionics RTDA standards, including DO-254 and DO-330
  • Familiarity with Hardware Description Languages (HDL) such as VHDL, Verilog, or SystemVerilog.
  • Knowledge of standard languages like SystemRDL and IP-XACT.

Responsibilities

  • Contribute to the development of a cutting-edge toolchain that automates the creation of FPGA/ASIC register blocks.
  • Design, integrate, and test software components to support toolchain automation.
  • Collaborate with experienced FPGA engineers to ensure the toolchain meets DO-254 avionics certification standards.
  • Enhance productivity and consistency across FPGA and ASIC development projects.
  • Participate in design discussions, code reviews, and system integration activities.
  • Apply software engineering best practices to create robust, reliable, and maintainable tools.

Other

  • Requires a High School Diploma or equivalent and student must be pursuing a Bachelor’s or advanced degree in an applicable discipline.
  • U.S. citizenship is required, as only U.S. citizens are authorized to access information under this program/contract
  • Onsite