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FPGA/VHDL Engineer

DUIT

Salary not specified
Apr 15, 2025
Laurel, MD, US
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DUIT is seeking a Senior FPGA/VHDL Engineer to support FPGA/VHDL Assurance efforts in support of DoD.

Requirements

  • Experience in FPGAs (Field-Programmable Gate Arrays)
  • Experience in ASICs (Application-Specific Integrated Circuits)
  • Experience with VHDL
  • Demonstrated experience in planning and leading Systems Engineering efforts

Responsibilities

  • Review and evaluate various vendor FPGA/VHDL tools to ensure correct performance and functionality within FPGAs
  • Support FPGA/VHDL Assurance efforts in support of DoD
  • Apply general system engineering skills along with experience in FPGAs and ASICs

Other

  • Active high-level security clearance that required an investigative screening exam
  • Fourteen (14) years experience as a SE in programs and contracts of similar scope, type and complexity
  • Bachelor’s degree in System Engineering, Computer Science, Information Systems, Engineering Science, Engineering Management, or related discipline from an accredited college or university
  • Five (5) years of additional SE experience may be substituted for a bachelor’s degree