Integrate and support new HDL simulation technologies for accelerating the development and verification of silicon at Apple
Requirements
- Experience programming in Verilog / SystemVerilog for RTL design or testbench
- Experience programming in C/C++
- Experience scripting in Python, Lua or similar scripting language
- Experience architecting simulation compilation and verification flows
- Experience architecting HDL testbenches for functional verification
- Experience with compilers, parsers, or code-generation
- Experience with emulation testbench development and support
Responsibilities
- Migrate existing designs and testbenches from simulation and emulation platforms
- Develop software tools for co-simulating designs on multiple platforms
- Support design and verification teams in the use of this new technology
- Work independently and manage deliverables to different teams
Other
- B.S. degree in Computer Science, Electrical Engineering, or similar
- Occasional travel to development groups in the US
