QuEra Computing is seeking a leader to define and drive the overarching strategy for quantum error correction on current and next-generation neutral atom quantum computers.
Requirements
- Strong knowledge of decoding algorithms, fault-tolerant quantum logic, and resource estimation
- Experience designing error correction architectures for hardware platforms, including but not limited to neutral atom, trapped ion, superconducting qubit, or photonic platforms
- Experience translating theoretical QEC protocols to hardware implementations and working with experimental teams
- Familiarity with high-performance, real-time software for quantum error correction and hardware control
- Proven experience leading technical teams and coordinating large-scale, full-stack collaborations
Responsibilities
- Build and lead the long-term strategy and roadmap for quantum error correction across QuEra’s hardware platforms
- Design and oversee the development of hardware-efficient error correction, logical gate protocols, and decoding algorithms tailored to neutral atom array architectures
- Collaborate with hardware, control, and software engineering teams to integrate QEC protocols into real-time system operations
- Estimate and optimize resource overhead and cost models for quantum computation under various error correction approaches
- Provide technical leadership, mentorship, and strategic guidance to a growing team of researchers and developers working on quantum error correction
Other
- PhD in Quantum Computing, Physics, Computer Science, Mathematics, Electrical Engineering, or a related field
- 5+ years experience in quantum computing and quantum error correction
- Exceptional communication, collaboration, and technical leadership skills
