Micron Technology's Compute Memory Business Unit (CMBU) is seeking to define and deliver innovative DRAM architectures that meet evolving market demands, specifically for AI training and inference applications.
Requirements
- Familiarity with memory types and architecture
- Exposure to semiconductor packaging technologies
- Understanding of SoC/ASIC design and memory hierarchy
- Understanding of memory subsystem operation in high-performance computing environments
- Exposure to HW/SW co-optimization and regenerative AI frameworks
- Familiarity with industry trends and competitive memory technologies
Responsibilities
- Conduct system architecture exploration and analysis using modeling, simulation, and prototyping tools
- Collaborate with external partners to identify system bottlenecks and propose innovative solutions
- Explore system architectures that integrate low-power, high-performance memory technologies
- Investigate DRAM features that enhance value in AI training and inference applications
- Partner with internal R&D, design, and product teams to support new product concept implementation
Other
- Currently enrolled in a B.S. or M.S. program in Electrical Engineering, Computer Engineering, or a related field
- Strong communication skills with the ability to distill and convey technical information
- Ability to work collaboratively in a dynamic, cross-functional environment
- Experience presenting technical concepts at conferences or consortia
- Demonstrated ability to align technical decisions with business strategy
