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Packaging Engineering Intern - MS/PhD - Santa Clara

Texas Instruments

$46 - $57
Sep 18, 2025
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Texas Instruments is looking to solve customers' problems by delivering advances in miniaturization, integration, high reliability, high performance, and low power through innovative packaging technologies for analog and embedded processing products

Requirements

  • Semiconductor packaging knowledge is preferred (processes, assembly, reliability, materials, characterization, FA)
  • Demonstrated analytical and problem solving skills
  • Strong written and verbal communication skills
  • Ability to work in teams and collaborate effectively with people in different functions
  • Ability to build strong, influential relationships
  • Ability to work effectively in a fast-paced and rapidly changing environment

Responsibilities

  • Interface across various work areas and organizations to help with the design, development, and analysis of different semiconductor packaging technologies
  • Participation in cross-functional teams to develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages at different stages of readiness
  • Cultivate packaging advancements with work in material, mechanical, thermal, and electrical characterization

Other

  • Currently pursuing a Master's degree in Mechanical Engineering, Materials Science, Chemical Engineering, Physics or Electrical Engineering
  • Cumulative 3.0/4.0 GPA or higher
  • Strong time management skills that enable on-time project delivery
  • Ability to take the initiative and drive for results
  • Degree Level: Bachelor's Degree