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Principal Engineer - Design For Test - Dft

Marvell

$146,850 - $220,000
Sep 12, 2025
Santa Clara, CA, USA • Westborough, MA, USA
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Marvell is seeking a Senior Principal Engineer to address the challenges of designing and implementing DFT/Test solutions for complex IP and SOC in custom/compute ASIC/SoC designs, which are critical for driving high compute performance and acceleration in markets such as custom AI, 5G, and 6G.

Requirements

  • Direct DFT experience with at least 5 years in the custom chip design business
  • Led the DFT execution on several ASICs. Was responsible for all DFT execution functions from architecture definition to tape out through silicon bring-up.
  • Hands-on working experience in various stages of DFT-Execution: SCAN/MBIST/Validation/STA/IP-DFX/Post-Silicon Bring-up/Debug
  • Thorough knowledge on various DFT/Test architecture solutions and should have been involved in DFT-Architecture definition of at-least two monolithic designs.
  • Thorough knowledge on various DFT/Test architecture solutions for 2.5D/3D IC design and should be involved in DFT-Architecture definition of at-least couple of MCM designs.
  • Strong fundamentals in digital circuit design and logic design
  • Understanding of DFT flows and methodologies and experience with Siemens/Synopsys Tool set (Tessent, Spyglass/Tmax, Genus, Modus, NCSim/DC)

Responsibilities

  • The position will be responsible for architecting, leading and implementing DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs
  • The execution involves Design-for-Test architecture definition, implementation of various DFT/DFX features, validation, IP-DFT, STA, pattern generation & post-silicon bring-up and debug for various designs/IPs in Custom/Compute space.
  • The responsibility also includes mentoring, guiding and driving a small team of engineers enabling them for scaling across multiple designs.
  • The position also involves definition and enhancement of DFT methodologies and tools to be able to benchmark them and enable new methodologies in the domain of DFT/Test.
  • The engineer will be executing on existing and new programs.
  • Driving DFT architecture and inventing DFT solutions that address new scenarios.
  • Driving EDA vendors as part of the DFT execution.

Other

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
  • Excellent team player and can work with different function leaders, across different geographies to define and execute the DFT project to completion.
  • Excellent communications skill both verbal and written.
  • Scripting skills using Python, PERL, Tcl and C-Shell is plus.