Microchip Technology, Inc. is seeking a Principal Device Technology Engineer to develop next generation FinFet technology for Field Programmable Gate Arrays (FPGAs)
Requirements
- Experience in the operation and automation of semiconductor instrumentation.
- Knowledge of JMP software or other data analysis and statistical tools.
- Knowledge of layout and PDK tools.
- Strong knowledge of solid state physics, SRAM memories and latch up design rules.
- Knowledge of SPICE simulators and Interconnect modeling.
- Experience with C++ and Python.
Responsibilities
- Next generation FinFet devices and memories test chip development and characterization
- Work closely with Design Fabric team to develop test routines to test next generation FPGA Configuration memory macros.
- Characterize and simulate SRAM bias modes and define SAFE operating area.
- Develop and characterize latch-up design rules
- Provide quarterly reports on SPICE and interconnect model health.
- Develop and characterize test-chips with focus on ring oscillators and SRAM devices.
- Own and implement electrical characterization of a variety of semiconductor devices.
Other
- B.S. in Engineering or a related technical discipline.
- 10+ years of experience in the semiconductor industry.
- Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams.
- Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges.
- 0% - 25% travel time
