Marvell is looking to solve problems related to the full end-to-end lifecycle of Ethernet and AI Networking products, from New Production Introduction (NPI) to Mass Production Release (MPR), aiming to optimize product performance, quality, and cost.
Requirements
- Hands-on experience with ATE platforms (e.g., Advantest 93K, Teradyne) and System Level Test (SLT) to perform silicon debug, root cause analysis, and corrective actions
- Solid foundation in applied statistics for product characterization and quality improvement
- Familiarity with data analytics tools such as JMP and SiliconDash
- Solid background in test methodology, silicon process, package, and DFT/DFM
Responsibilities
- Own new product introduction (NPI) deliverables including product characterization, test operation, qualification, yield ramp, and manufacturability
- Propose and execute product cost and quality improvements
- Partner with design, DFT/DFM, process, package, and test teams to optimize product performance, quality, and cost across multiple test insertions (Wafer Sort, Final Test, SLT)
- Align cross-functional engineering teams to full-closure solutions, plan and drive strategic initiatives to enhance new product development methodology
- Prepare and present summary for regular update with cross-functional and executive team
Other
- Deep understanding of end-to-end product lifecycle and strategic cost management
- Strong schedule management and optimization skills (interest in process automation is a plus)
- Ability to lead cross-functional initiatives, work independently, and manage complex problem solving
- Strong skill in transforming complex data analytics into high-level presentations
- This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law.
