Voltai is looking to solve the problem of developing world models and embodied agents to learn, evaluate, plan, experiment, and interact with the physical world, starting with understanding and building hardware, electronics systems, and semiconductors where AI can design and create beyond human cognitive limits.
Requirements
- Training LLMs or foundation models on semiconductor design and verification corpora (e.g., RTL, netlists, PDKs, simulation logs)
- Modeling design scaling laws and optimizing compute budgets for chip-design-specific workloads
- Generating large-scale synthetic design data (e.g., RTL variants, testbenches, verification traces)
- Building evals that correlate with downstream design metrics (e.g., timing closure, power, area, verification coverage)
Responsibilities
- Train frontier models to become highly knowledgeable semiconductor design and verification experts
- Develop methods for generating and curating synthetic design data
- Perform model distillation, and enabling continual learning at scale
- Work closely with hardware engineers, RL researchers, and verification specialists to create evals that guide design data quality and model improvement
- Collaborate with compute engineers to scale efficient training across thousands of GPUs and RL environments
- Build high-performance tools to investigate how data and simulation shape model-driven design intelligence
Other
- Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc.
- Team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents
