Voltai is looking to solve the problem of accelerating the pace of semiconductor innovation by developing world models and embodied agents to learn, evaluate, plan, experiment, and interact with the physical world, specifically in the area of semiconductor design and verification.
Requirements
- experience creating and scaling RL environments for LLMs or multimodal agents
- experience building high-quality evaluation datasets and benchmarks for complex reasoning or design tasks
- experience working closely with domain experts in hardware and verification to define evaluation metrics, constraints, and simulation conditions
- experience designing reward functions and feedback pipelines that balance correctness, performance, and design efficiency
- experience running large-scale RL fine-tuning or post-training experiments for frontier models
- experience applying reinforcement learning or curriculum learning to structured reasoning or symbolic domains
Responsibilities
- post-train frontier models to autonomously perform complex tasks across the semiconductor design and verification pipeline
- collaborate with leading experts in hardware design, verification, and computer architecture to design rich reinforcement learning environments that capture the intricacies of chip design workflows
- develop structured reward functions, scaling strategies, and evaluation frameworks that push models toward higher reliability, efficiency, and creativity in semiconductor reasoning
- propose and optimize chip architectures
- generate and refine RTL code
- run simulations
- identify verification gaps, and iteratively improve designs
Other
- collaboration with leading experts in hardware design, verification, and computer architecture
- work closely with domain experts in hardware and verification
- ability to work with a team of previous Stanford professors, SAIL researchers, Olympiad medalists, CTOs, and former US Secretary of Defense
