Marvell Central Engineering (CE) develops Marvell's most advanced High-Speed SerDes (HSS) IPs. Central System Engineering (CSE) is responsible for validating all Marvell HSS IPs in the lab environment and supporting all Marvell business units for fast and smooth SoC production.
Requirements
- Proficiency in at least one scripting/programming language: Python, C/C++, C-Sharp.
- Familiarity with hardware interfaces and protocols (e.g., PCIe, USB, Ethernet, SerDes).
- Understanding of basic signal integrity and physical layer concepts.
- Experience with Windows or Linux environments and command-line tools.
- Experience with instrument control via SCPI, VISA, PyVISA, or similar tools.
- Familiarity with hardware validation, lab equipment automation, or bring-up processes.
- Exposure to Git, Jenkins, or other CI/CD tools.
Responsibilities
- Design, develop, and maintain internal tools for PHY validation and testing.
- Automate test workflows, data acquisition, and reporting processes.
- Work with hardware validation engineers to understand test requirements and translate them into software solutions.
- Write scripts and test frameworks to interface with lab equipment (e.g., oscilloscopes, BERTs, signal generators).
- Analyze test logs and results to support debugging and performance tuning.
- Participate in code reviews and documentation efforts.
Other
- Pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Strong problem-solving skills and attention to technical detail.
- Good communication and ability to work collaboratively in a cross-functional environment.
- Experience working on projects involving hardware/software co-design or embedded systems.
- Coursework or projects involving digital/analog communication systems.
