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Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. In this role, you will be responsible for analysis, optimization, and compilation of Machine Learning (ML) models targeting the Tensor TPU. Your work enables Gemini Nano, the efficient AI model for on-device tasks to run on Pixel phones. The goal is to productize the latest ML innovations and research by delivering computing hardware and software. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Requirements

• 2 years of experience with software development in one or more programming languages (e.g. C++)
• 2 years of experience working with compilers (LLVM, MLIR, etc.).
• 2 years of experience with data structures or algorithms.
• Experience with compiler development in the context of accelerator-based architectures.
• Experience in optimizing ML models for inference.

Responsibilities

• Work as part of the Tensor Tensor Processing Unit (TPU) compiler team, including analyzing and improving the compiler quality and performance on optimization decisions, correctness and compilation time.
• Work with Tensor TPU architects to design future accelerators, the HW/SW interface, and co-optimizations of the next generation Tensor TPU architectures.
• Develop parallelization and scheduling algorithms to optimize compute and data movement costs to execute ML workloads on the Tensor TPU.
• Work on efficient mapping of Generative AI (GenAI) models and other key workloads into Tensor TPU instructions through the compiler.
• Collaborate with ML model developers, researchers, and Tensor TPU hardware/software teams to accelerate the transition from research ideas to exceptional user experiences running on the Tensor TPU.

Other

• Mountain View, CA, USA; Kirkland, WA, USA
• Bachelor’s degree or equivalent practical experience.
• Master's degree or PhD in Computer Science or related technical fields.