Cadence is looking to solve the problem of optimizing Power, Performance, and Area (PPA) for advanced digital ASICs through the development of the Genus Synthesis Solution, a state-of-the-art logic synthesis tool.
Requirements
- Strong programming skills in C/C++; exposure to Python and Tcl is a plus.
- Solid understanding of data structures, algorithms, and object-oriented programming.
- Familiarity with logic synthesis, physical design, and timing analysis.
- Experience with Unix/Linux environments.
Responsibilities
- Design, implement, troubleshoot, and debug software programs on Unix/Linux platforms.
- Develop and enhance algorithms for logic synthesis and physical design flows.
- Validate new synthesis features and ensure correctness and optimal configurations.
- Assist with customer support by analyzing tool usage and providing feedback to R&D.
- Contribute to documentation, including Product Requirement Specifications (PRS) for new features.
Other
- Currently pursuing a PhD in Computer Science, Electrical Engineering, or Computer Engineering.
- Excellent analytical and problem-solving skills; strong communication abilities.
