Rambus is seeking to hire an exceptional Test Engineering Intern to join their Engineering team in San Jose, CA, to work on cutting-edge memory and silicon IP technology shaping the future of data centers and high-performance systems.
Requirements
- Knowledge with high-speed testing
- Strong programming background (C, C++, PERL)
- Knowledge of DFT (scan, IDDQ, JTAG) and analog test methologies
Responsibilities
- Work with DFT and design team to define test plans for new products.
- Develop test strategies with the design and validation engineering teams to ensure product performance during all product life cycle phases
- Wafer-sort development
- Bench test capability to correlate/debug the ATE TP.
- Test plan documentation compiling the test instructions from DE and other teams.
- Work with product engineering to attain target yield and test time
- Have a complete test program ready in advance of first silicon
Other
- BS degree in electrical/electronics with some relevant experience
- Full-Time position
- Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.
