Intel's AI SoC organization is building next-generation ASICs for AI applications across edge and cloud and needs a Verification Engineer to ensure functional correctness of complex digital designs
Requirements
- Knowledge of SystemVerilog and UVM methodology
- Understanding of digital design fundamentals and verification concepts
- Familiarity with EDA tools: simulators (VCS, Questa), coverage tools, and waveform debug
- Basic scripting skills (Python, Perl, TCL) for automation
- 4+ years of experience in ASIC/SoC verification
- Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
Responsibilities
- Perform digital ASIC verification at block and system level
- Develop and execute test plans; write and review test sequences
- Build SystemVerilog testbench infrastructure (UVM and non-UVM) for functional verification
- Run regressions, analyze results, and drive code and functional coverage closure
- Collaborate with design teams to debug and resolve issues
- Contribute to pre-silicon verification, chip bring-up, and post-silicon validation
- Be a hands-on self-starter who can execute verification steps for complex designs
Other
- Ability to work in a fast-paced environment and adapt to changing requirements
- Strong problem-solving skills and eagerness to learn
- Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
- 4+ years of experience in ASIC/SoC verification
- All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance
